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Fundamental Of Basic Electronics @ 45 Days

Basic Electronics Engineering Bachelor of Engineering(BE) videos According to syllabus of Institute of Engineering(IoE), Tribhuvan University (TU)

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250+ Students Enrolled Nepali Updated Oct 2024

What you'll learn

Master core syllabus concepts aligned with CDC and university requirements
Solve model and past board questions step-by-step with experienced educators
Reinforce learning with practice exercises and curriculum revision notes
Enjoy 24/7 self-paced study with anytime, anywhere access across web and mobile
Course Curriculum 9 Sections • 207 Lectures
Free Preview Available: Watch "1. Marking Schemes.mp4" before enrolling.
1. Marking Schemes.mp4 Free Preview
00:01:36
1. Active and Passive components.mp4 Free Preview
00:07:42
2. Kirchhoff's Law.mp4 Free Preview
00:01:50
3. Signal Sources.mp4
00:02:45
4. Controlled Source.mp4
00:04:15
5. Superposition Theorem.mp4
00:09:44
6. Superposition Theorem Example 2.mp4
00:11:33
7. Superposition Example 3.mp4
00:06:52
8. Thevenin's theorem.mp4
00:08:14
9. Thevenin's example 2.mp4
00:05:56
10. Thevenin's Example 3.mp4
00:06:46
11. Norton's Theorem.mp4
00:07:07
12. Norton Example2.mp4
00:07:04
13. Filter.mp4
00:03:52
14. Low Pass Filter.mp4
00:05:02
15. RC High pass Filter.mp4
00:03:15
16. Gain Transconductance and Transimpedance.mp4
00:04:20
1. Diode.mp4
00:04:09
2. Diode biasing.mp4
00:05:33
3. IV characterstics of diode.mp4
00:04:53
4. load line concept.mp4
00:05:43
5. Small Signal Model.mp4
00:07:06
6. large Signal Model.mp4
00:02:38
7. Clamper Circuit.mp4
00:08:28
8. Clamper example 2.mp4
00:07:28
9. clippers example 1.mp4
00:07:53
10. clipper example 2.mp4
00:07:09
11. Clipper Example 3.mp4
00:04:01
12. Zener diode.mp4
00:03:50
13. zener diode numerical 1.mp4
00:11:20
14. zener diode example 2.mp4
00:06:00
15. Half Wave Rectifier.mp4
00:04:11
16. Full Wave Rectifier(Central Tapped).mp4
00:03:55
17. Full-Wave Bridge Rectifier.mp4
00:05:06
18. LED and varactor diode.mp4
00:02:33
19. Photo diode and tunnel diode.mp4
00:04:19
20. Piecewise linear model.mp4
00:02:14
1. BJT.mp4
00:02:23
2. working of bjt.mp4
00:02:56
3. fixed bias configuration.mp4
00:04:31
4. Emitter bias configuration.mp4
00:05:53
5.Emitter bias numerical1.mp4
00:07:31
6. Collector feedback biasing.mp4
00:05:23
7. Collector feedback numerical.mp4
00:05:58
8. voltage divider bias numerical.mp4
00:10:12
9. voltage divider numerical.mp4
00:07:58
10. Common base configuration.mp4
00:10:46
11. Common emitter configuration.mp4
00:08:40
12. Common collector configuration.mp4
00:02:22
13. Loadline in BJT.mp4
00:09:11
14. Transistor Modeling.mp4
00:04:07
15. Small signal analysis( Hybrid pi model).mp4
00:05:36
16. T-model.mp4
00:04:05
17. Differential amplifier.mp4
00:03:48
18. BJT as not gate.mp4
00:02:05
19. BJT as NAND.mp4
00:03:26
20. BNJT as NOR.mp4
00:03:08
21. Enhancement MOSFET.mp4
00:07:22
22. Depletion type MOSFET.mp4
00:05:45
23. NMOS and PMOS.mp4
00:11:19
24. CMOS.mp4
00:04:27
25. CMOS as NAND and NOR.mp4
00:09:58
26. operating point numerical.mp4
00:06:25
1. Introduction.mp4
00:02:50
2. Properties of ideal op amp.mp4
00:02:20
3. Virtual Ground.mp4
00:02:39
4. Inverting amplifier.mp4
00:04:41
5. Non inverting amplifier.mp4
00:05:09
6. Adder.mp4
00:04:10
7. Integrator.mp4
00:05:29
8. Differentiator.mp4
00:03:35
9. Numerical example.mp4
00:04:12
10. Positive and negative feedback.mp4
00:04:40
11. Barkhausen Criteria.mp4
00:07:26
12. Square wave generator(Part 1).mp4
00:09:27
13.. Square wave generator (part 2).mp4
00:04:43
14.Triangular wave generator.mp4
00:11:55
15. Wein Bridge Oscillator.mp4
00:13:07
16. Concept of stability.mp4
00:02:09
1. Introduction.mp4
00:03:14
2. Block diagram of communication System.mp4
00:03:57
3. Em wave and propagation.mp4
00:04:18
4. Antenna.mp4
00:05:12
5. Modulation.mp4
00:03:56
6. Broadcasting and communication.mp4
00:02:47
7. internet vs Intranet.mp4
00:02:15
8. Optical fibre.mp4
00:03:33
1. Number System.mp4
00:09:20
2. Binary to other number system.mp4
00:08:28
3. Octal to other number system.mp4
00:06:35
4. Hexadecimal to other number system.mp4
00:06:08
5. Basic Gate.mp4
00:03:16
6. Universal Gates.mp4
00:02:39
7. Ex-OR and Ex-NOR gate.mp4
00:03:18
8. NAND as universal gate.mp4
00:04:30
9. NOR as universal gate.mp4
00:03:14
10. Multiplexer.mp4
00:10:04
11. Demultiplexer.mp4
00:09:01
12. Encoder.mp4
00:04:13
13. Decoder.mp4
00:07:00
14. Combinational circuit.mp4
00:05:51
15. Minterms and maxterms.mp4
00:00:00
16. K-MAP theory.mp4
00:09:21
17. K-MAP Example 1.mp4
00:11:44
18. K-MAP Example 2.mp4
00:19:12
19. K-MAP Example 3.mp4
00:08:10
20. SR flipflop.mp4
00:11:02
21. D flipflop.mp4
00:04:22
22. jk flipflop.mp4
00:07:57
23. master-slave jk.mp4
00:03:20
24. T Flipflop.mp4
00:04:22
25. Register.mp4
00:03:19
26. SISO register.mp4
00:08:24
27. SIPO register.mp4
00:07:09
28.PISO register.mp4
00:10:29
29. PIPO register.mp4
00:03:12
30. Counter.mp4
00:06:43
1. Instrumentation system.mp4
00:04:41
2.Transducer.mp4
00:02:08
3.1 Strain gauge.mp4
00:03:07
3.2. Data logger.mp4
00:03:21
3.3 DMM.mp4
00:02:49
4. Oscilloscope.mp4
00:03:43
5. Regulated power supply.mp4
00:02:52
6. Remote Control.mp4
00:04:31
7. character display.mp4
00:04:17
8. Clock counter measurement.mp4
00:04:44
9. Audio video system.mp4
00:03:33
2073 Bhadra|Q. 1.mp4
00:04:13
2073 Bhadra|Q. 2.mp4
00:11:31
2073 Bhadra|Q. 3.mp4
00:04:07
2073 Bhadra|Q. 4.mp4
00:04:08
2073 Bhadra|Q. 5.mp4
00:11:49
2073 Bhadra|Q. 6.mp4
00:01:59
2073 Bhadra|Q. 7.mp4
00:00:38
2073 Bhadra|Q. 8.mp4
00:03:37
2073 Bhadra|Q. 9.mp4
00:00:48
2073 Bhadra|Q. 10.mp4
00:00:45
2073 Bhadra|Q. 11.mp4
00:01:14
2073 Bhadra|Q. 12.mp4
00:00:48
2073 Bhadra|Q. 13.mp4
00:00:56
2073 Bhadra|Q. 14.mp4
00:00:43
2073 Bhadra|Q. 15.mp4
00:00:38
2073 Bhadra|Q. 16.mp4
00:03:13
2073 Magh|Q, 1.mp4
00:06:48
2073 Magh|Q. 2.mp4
00:00:44
2073 Magh|Q. 3.mp4
00:04:50
2073 Magh|Q. 4.mp4
00:09:45
2073 Magh|Q. 5.mp4
00:00:58
2073 Magh|Q. 6.mp4
00:01:35
2073 Magh|Q. 7.mp4
00:04:24
2073 Magh|Q. 8.mp4
00:00:55
2073 Magh|Q. 9.mp4
00:03:52
2073 Magh|Q. 10.mp4
00:00:44
2073 Magh|Q. 11.mp4
00:03:43
2073 Magh|Q. 12.mp4
00:00:39
2073 Magh|Q. 13.mp4
00:05:13
2073 Magh|Q. 14.mp4
00:00:46
2073 Magh|Q. 15.mp4
00:00:46
2074 Bhadra|Q. 1.mp4
00:02:04
2074 Bhadra|Q. 2.mp4
00:03:10
2074 Bhadra|Q. 3.mp4
00:05:15
2074 Bhadra|Q. 4.mp4
00:00:57
2074 Bhadra|Q. 5.mp4
00:09:27
2074 Bhadra|Q. 6.mp4
00:02:04
2074 Bhadra|Q. 7.mp4
00:07:18
2074 Bhadra|Q. 8.mp4
00:00:45
2074 Bhadra|Q. 9.mp4
00:00:51
2074 Bhadra|Q. 10.mp42074 Bhadra|
00:02:04
2074 Bhadra|Q. 11.mp4
00:03:05
2074 Bhadra|Q. 12.mp4
00:01:25
2074 Bhadra|Q. 13.mp4
00:03:41
2074 Bhadra|Q. 14.mp4
00:04:34
2074 Bhadra|Q. 15.mp4
00:03:07
2074 Bhadra|Q. 16.mp4
00:03:13
2075 Baisakh|Q. 1.mp4
00:05:54
2075 Baisakh|Q. 2.mp4
00:00:59
2075 Baisakh|Q. 3.mp4
00:02:37
2075 Baisakh|Q. 4.mp4
00:05:06
2075 Baisakh|Q. 5.mp4
00:12:27
2075 Baisakh|Q. 6.mp4
00:05:40
2075 Baisakh|Q. 7.mp4
00:03:17
2075 Baisakh|Q. 8.mp4
00:00:40
2075 Baisakh|Q. 9.mp4
00:04:56
2075 Baisakh|Q. 10.mp4
00:08:44
2075 Baisakh|Q. 11.mp4
00:02:04
2075 Baisakh|Q. 12.mp4
00:02:29
2075 Baisakh|Q. 13.mp4
00:01:36
2075 Baisakh|Q. 14.mp4
00:05:12
2075 Baisakh|Q. 15.mp4
00:00:40
2075 Baisakh|Q. 16.mp4
00:04:14
2077 Chaitra|Q. 1.mp4
00:02:29
2077 Chaitra|Q. 2.mp4
00:05:01
2077 Chaitra|Q. 3.mp4
00:00:52
2077 Chaitra|Q. 4.mp4
00:05:02
2077 Chaitra|Q. 5.mp4
00:04:44
2077 Chaitra|Q. 6.mp4
00:00:44
2077 Chaitra|Q. 7.mp4
00:09:31
2077 Chaitra|Q. 8.mp4
00:03:37
2077 Chaitra|Q. 9.mp4
00:04:24
2077 Chaitra|Q. 10.mp4
00:10:17
2077 Chaitra|Q. 11.mp4
00:00:39
2077 Chaitra|Q. 12.mp4
00:01:21
2077 Chaitra|Q. 13.mp4
00:08:29
2077 Chaitra|Q. 14.mp4
00:11:00
2077 Chaitra|Q. 15.mp4
00:04:48
2077 Chaitra|Q. 16.mp4
00:04:22

Requirements

  • Students are required to have knowledge of Electronics, based on syllabus of IoE

Course Description

The videos herein are strictly based on syllabus of Institute of Engineering Tribhuwan University, Nepal promoting "e-Learning in Nepal" and are made with intention to provide guidance to the "Bachelor in Engineering(BE) appearing students", for securing good results. The course tries to cover all the basics of Flip Flop (RS, JK, T, D), Fixed DC Biasing, Emitter Feedback Biasing & Collector Feedback Biasing and Voltage Divider Biasing. This course also comprises De-Morgan's Theorem, Boolean Laws & Theorem, Logic Gates and Realization and Karnaugh Map(K-Map) with most frequently asked questions in final exam of BE along with fundamental theories and numerical solutions. We strongly believe that, viewers will be benefited from these videos and the thirst of curiosity of viewers will be quenched! Feedbacks and suggestion to improve are always welcome and highly appreciated!

Instructor

M
Mero School Academic Team

Senior Academic Instructor • Mero School E-Learning